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Optimized Class-E RF Power Amplifier Design In Bulk CMOS

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Optimized Class-E RF Power Amplifier Design In Bulk CMOS

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dc.contributor.author Wang, Tao en_US
dc.date.accessioned 2008-04-22T02:41:29Z
dc.date.available 2008-04-22T02:41:29Z
dc.date.issued 2008-04-22T02:41:29Z
dc.date.submitted August 2007 en_US
dc.identifier.other DISS-1856 en_US
dc.identifier.uri http://hdl.handle.net/10106/680
dc.description.abstract The telecommunication market calls for the integration of complicated wireless applications. To build RF power amplifiers in CMOS remains challenging due to the nonideal effects in CMOS. The aim of this thesis is to provide an optimized yet explicit design method for the Class-E amplifiers in CMOS. Taking the finite DC feed inductor into consideration, a simple but accurate numerical design method is proposed by applying polynomial interpolation. Combining with a practical design stategy for nonideal transistors of finite conductance and parasitic capacitances, a two-staged Class-E power amplifier is implemented in 0.18um CMOS. The simulation results show that this power amplifier can deliver at least a 23dBm power to a 50Ohm load with 73.5% PAE at 2.4GHz. The good agreement between simulation results and the predicted values validates this design method and its applications in CMOS. This method could be applied to general design cases. en_US
dc.description.sponsorship Xiao, Enjun en_US
dc.language.iso EN en_US
dc.publisher Electrical Engineering en_US
dc.title Optimized Class-E RF Power Amplifier Design In Bulk CMOS en_US
dc.type M.S. en_US
dc.contributor.committeeChair Xiao, Enjun en_US
dc.degree.department Electrical Engineering en_US
dc.degree.discipline Electrical Engineering en_US
dc.degree.grantor University of Texas at Arlington en_US
dc.degree.level masters en_US
dc.degree.name M.S. en_US

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