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Emulation Of ASIC Based Network Processor On A FPGA Platform

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Emulation Of ASIC Based Network Processor On A FPGA Platform

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dc.contributor.author Vajja, Sharada en_US
dc.date.accessioned 2007-08-23T01:56:18Z
dc.date.available 2007-08-23T01:56:18Z
dc.date.issued 2007-08-23T01:56:18Z
dc.date.submitted August 2006 en_US
dc.identifier.other DISS-1418 en_US
dc.identifier.uri http://hdl.handle.net/10106/221
dc.description.abstract ABSTRACT Exponential increase of device sizes and complexity of ASICs mandate the need for design verification to meet timing specifications and functionality requirements. Verification techniques are broadly implemented in three categories viz., simulation, verification using commercial emulators and FPGA based prototyping. An Intel architecture based network processor, to be taped out in the near future, is being emulated on FPGA based platform. The basic blocks of the Network Processor, for instance, the Memory Controller Hub and I/O controller Hub were synthesized to be configured on FPGAs. The work involved synthesizing the design, partitioning it on multiple FPGAs and pin multiplexing of I/Os. Each sub unit of MCH and ICH were analyzed to resolve gated clocks not supported in FPGAs but widely used by ASIC designers for reducing power consumption. Synplicity's Certify tool is used for partitioning, pin multiplexing and for gated clock fixes. FPGA compatible block RAMs were generated with Xilinx Coregen. Design is being configured on Xilinx Virtex-4 FPGAs which provide high performance and high density boards for prototyping ASICs with millions of transistors. Xilinx ISE 8.1 is used for place and route of the design and to implement it for generate bit files burnt on PROMs to be configured on FPGA boards. en_US
dc.description.sponsorship Davis, W. Alan en_US
dc.language.iso EN en_US
dc.publisher Electrical Engineering en_US
dc.title Emulation Of ASIC Based Network Processor On A FPGA Platform en_US
dc.type M.S.E.E. en_US
dc.contributor.committeeChair Davis, W. Alan en_US
dc.degree.department Electrical Engineering en_US
dc.degree.discipline Electrical Engineering en_US
dc.degree.grantor University of Texas at Arlington en_US
dc.degree.level masters en_US
dc.degree.name M.S.E.E. en_US
dc.identifier.externalLink https://www.uta.edu/ra/real/editprofile.php?onlyview=1&pid=1182
dc.identifier.externalLinkDescription Link to Research Profiles

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